Pass 382 · GAP certificate trace

Reversible logic-switch controller

A static, browser-visible rendering of the certified 48-state LOAD/FLIP/LATCH controller. This page only displays the precomputed GAP certificate; it has no JavaScript and performs no mathematics in the browser.

Controller states
48
Edge-step indices
16
Phase clock
C3
GAP checks
15 / 15

Scope boundary

This isolated controller contains no actual header flag, Q6 edge, route, or physical-oscillator binding. Its edge-step wrap is a controller-frame convention, not a Q6 path closure. Pass 380 owns the actual scheduler phase-lift result; this display neither refines nor binds that map.

Two certified maps, with different roles

T controller successor

The reversible sequence clock moves through the three-operation word and advances the edge-step index only at a latch.

T(edge,0)=(edge,1) T(edge,1)=(edge,2) T(edge,2)=(edge+1 mod 16,0)

Certified: exact order 48, one 48-state reachable orbit, and a two-sided inverse.

P phase clock

The free C3 action rotates the phase position within an edge-step index; it is not the controller successor.

P(edge,phase)=(edge,phase+1 mod 3)

Certified: 16 free three-state phase orbits. P differs from T on exactly the latch phase; the maps fail to commute on FLIP and LATCH states.

Certified fault-injection summaries

Each comparison is against the specified successor T. These are control-state diagnostics, not claims of fault correction, timing performance, or hardware realization.

P replaces T

16 wrong ticks
affected phase
2 (LATCH)
orbit sizes
3
syndrome pairs
[0,32], [45,16]

Stutter

48 wrong ticks
replacement
identity
orbit sizes
1
syndrome pairs
[47,48]

Double tick

48 wrong ticks
replacement
T^2
orbit sizes
24
syndrome pairs
[1,48]

Full certified 48-state transition table

LOADFLIPLATCH Each row is copied from the GAP-emitted certificate. The final latch is the one controller-frame wrap.

State = (edge-step index, phase). “T previous” is the certified inverse-transition predecessor.
stateoperationT nextT previousP nextlatch advances edgeframe wrap
(0,0)LOAD_FLAG(0,1)(15,2)(0,1)nono
(0,1)FLIP_Q6_AXIS(0,2)(0,0)(0,2)nono
(0,2)LATCH_VERTEX(1,0)(0,1)(0,0)yesno
(1,0)LOAD_FLAG(1,1)(0,2)(1,1)nono
(1,1)FLIP_Q6_AXIS(1,2)(1,0)(1,2)nono
(1,2)LATCH_VERTEX(2,0)(1,1)(1,0)yesno
(2,0)LOAD_FLAG(2,1)(1,2)(2,1)nono
(2,1)FLIP_Q6_AXIS(2,2)(2,0)(2,2)nono
(2,2)LATCH_VERTEX(3,0)(2,1)(2,0)yesno
(3,0)LOAD_FLAG(3,1)(2,2)(3,1)nono
(3,1)FLIP_Q6_AXIS(3,2)(3,0)(3,2)nono
(3,2)LATCH_VERTEX(4,0)(3,1)(3,0)yesno
(4,0)LOAD_FLAG(4,1)(3,2)(4,1)nono
(4,1)FLIP_Q6_AXIS(4,2)(4,0)(4,2)nono
(4,2)LATCH_VERTEX(5,0)(4,1)(4,0)yesno
(5,0)LOAD_FLAG(5,1)(4,2)(5,1)nono
(5,1)FLIP_Q6_AXIS(5,2)(5,0)(5,2)nono
(5,2)LATCH_VERTEX(6,0)(5,1)(5,0)yesno
(6,0)LOAD_FLAG(6,1)(5,2)(6,1)nono
(6,1)FLIP_Q6_AXIS(6,2)(6,0)(6,2)nono
(6,2)LATCH_VERTEX(7,0)(6,1)(6,0)yesno
(7,0)LOAD_FLAG(7,1)(6,2)(7,1)nono
(7,1)FLIP_Q6_AXIS(7,2)(7,0)(7,2)nono
(7,2)LATCH_VERTEX(8,0)(7,1)(7,0)yesno
(8,0)LOAD_FLAG(8,1)(7,2)(8,1)nono
(8,1)FLIP_Q6_AXIS(8,2)(8,0)(8,2)nono
(8,2)LATCH_VERTEX(9,0)(8,1)(8,0)yesno
(9,0)LOAD_FLAG(9,1)(8,2)(9,1)nono
(9,1)FLIP_Q6_AXIS(9,2)(9,0)(9,2)nono
(9,2)LATCH_VERTEX(10,0)(9,1)(9,0)yesno
(10,0)LOAD_FLAG(10,1)(9,2)(10,1)nono
(10,1)FLIP_Q6_AXIS(10,2)(10,0)(10,2)nono
(10,2)LATCH_VERTEX(11,0)(10,1)(10,0)yesno
(11,0)LOAD_FLAG(11,1)(10,2)(11,1)nono
(11,1)FLIP_Q6_AXIS(11,2)(11,0)(11,2)nono
(11,2)LATCH_VERTEX(12,0)(11,1)(11,0)yesno
(12,0)LOAD_FLAG(12,1)(11,2)(12,1)nono
(12,1)FLIP_Q6_AXIS(12,2)(12,0)(12,2)nono
(12,2)LATCH_VERTEX(13,0)(12,1)(12,0)yesno
(13,0)LOAD_FLAG(13,1)(12,2)(13,1)nono
(13,1)FLIP_Q6_AXIS(13,2)(13,0)(13,2)nono
(13,2)LATCH_VERTEX(14,0)(13,1)(13,0)yesno
(14,0)LOAD_FLAG(14,1)(13,2)(14,1)nono
(14,1)FLIP_Q6_AXIS(14,2)(14,0)(14,2)nono
(14,2)LATCH_VERTEX(15,0)(14,1)(14,0)yesno
(15,0)LOAD_FLAG(15,1)(14,2)(15,1)nono
(15,1)FLIP_Q6_AXIS(15,2)(15,0)(15,2)nono
(15,2)LATCH_VERTEX(0,0)(15,1)(15,0)yesyes